Education and Career Forum

There are seven questions in all; the first question is a compulsory one while the candidates can answer any four questions out of the remaining six. Questions are conceptual, theoretical and mathematical problems. Some of the questions are: draw analog design octagon and explain its significance, explain pipelined design concept, explain low design considerations, what is the cell ratio pull up of 6T SRAM cell and in what ways does this affect the read/write operation, what are the parasitic elements of interconnect wire and in what ways do they affect the electrical behavior of the circuit, explain modeling of RC delay of interconnect wire using distributed RC model, how can this be reduced, implement 4 bit adder using Carry Look Ahead (CLA) principle, explain EEPROM using floating gate NMOSFET, write short notes on charge sharing and transistor sizing, the rate of sense amplifier, false cell construction and working, switched capacitor amplifier and telescopic cascade op-amps.