#1
25th February 2011, 01:18 PM
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Syllabus and exam pattern for ISRO exam (Electronics branch)?
i want to know the syllabus of electronics branch for isro exam and also exam pattern
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#2
25th February 2011, 02:16 PM
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Re: Syllabus and exam pattern for ISRO exam (Electronics branch)?
hi,
Eligibility: BE/B.Tech or equivalent in First Class with an aggregate minimum of 65% (average of all semesters for which results are available). Candidates who are slated to complete the BE/B.Tech course in the academic year 2009-10 are also eligible to apply provided final Degree is available by 31.8.2011 Age Limit: 35 years as on 26-02-2011 (40 years in case of SC/ST candidates and 38 years for OBC candidates. syllabus Network graphs: matrices associated with graphs; incidence, fundamental cut set and fundamental circuit matrices. • Solution methods: nodal and mesh analysis. • Network theorems: superposition, Thevenin and Norton’s maximum power transfer, Wye-Delta transformation. Steady state sinusoidal analysis using phasors. Linear constant coefficient differential equations; time domain analysis simple RLC circuits, Solution of network equations using Laplace transform; frequency domain analysis of RLC circuits. • 2-port network parameters: driving point and transfer functions. State equations for networks. • Electronic Devices: Energy bands in silicon, intrinsic and extrinsic silicon. • Carrier transport in silicon: diffusion current, drift current, mobility, resistivity. Generation and recombination of carriers. p-n junction diode, Zener diode, tunnel diode, BJT, JFET, MOS capacitor, MOSFET, LED, p-I-n and avalanche photo diode, LASERs. Device technology: integrated circuits fabrication process, oxidation, diffusion, ion implanation, photolithography, n-tub, p-tub and twin-tub CMOS process. • Analog Circuits: Equivalent circuits (large and small-signal) of diodes, BJTs, JFETs, and MOSFETs. Simple diode circuits, clipping, clamping, recitifier. Biasing and bias stability of transistor and FET amplifiers. • Amplifiers: single-and multi-stage, differential, operational, feedback and power. Analysis of amplifiers; frequency response of amplifiers. Simple op-amp circuits. Filters. Sinusoidal oscillators; criterion for oscillation; single-transistor and op-amp configurations. Function generators and wave-shaping circuits. Power supplies. • Digital circuits: Boolean algebra, minimization of Boolean functions; logic gates digital IC families (DTL, TTL, ECL, MOS, CMOS). Combinational circuits: arithmetic circuits, code converters, multiplexers and decoders. • Sequential circuits: latches and flip-flops, counters and shift-registers. Sample and hold circuits, ADCs, DACs. Semiconductor memories. • Microprocessor(8085): architecture, programming, memory and I/O interfacing. • Signals and Systems: Definitions and properties of Laplace transform, continuous-time and discrete-time Fourier seris, continuous-time and discrete-time Fourier Transform, z-transform. Sampling theorems. Linear Time-Invariant (LTI) Systems: definitions and properties; casuality, stability, impulse response, convoilution, poles and zeros frequency response, group delay, phase delay. Signal transmission through LTI systems. • Random signals and noise: probability, random variables, probability density function, autocorrelation, power spectral density. • Controls Systems: Basic control system components; block diagrammatic description, reduction of block diagrams. Open loop and closed loop (feedback) systems and stability analysis of these systems. Signal flow graphs and their use in determining transfer functions of systems; transient and steady state analysis of LTI control systems and frequency response. • Tools and techniques for LTI control system analysis: root loci, Routh-Hurwitz criterion, Bode and Nyquist plots. • Control system compensators: elements of lead and lag compensation, elements of Proporational-Integral-Derivative(PID) control. State variable representation and solution of state equation of LTI control systems. • Communications: Analog communication systems: amplitude and angle modulation and demodulation systems, spectral analysis of these operations, superheterodyne receivers; elements of hardware, realizations of analog communication systems; signal-to-noise ratio (SNR) calculations for amplitude modulation (AM) and frequency modulation (FM) for low noise conditions. • Digital communication systems: pulse code modulation (PCM), differential pulse code modulation (DPCM), delta modulation (DM); digital modulation schemes-amplitude, phase and frequency shift keying schemes (ASK, PSK, FSK), matched filter receivers, bandwith consideration and probability of error calculations for these schemes. • Electromagnetics: Elements of vector calculus: divergence and curl; Gauss’ and Stokes’ theorems, Maxwell’s equations: differential and integral forms. Wave equation, Poynting vector. • Plane waves: propagation through various media; reflection and refraction; phase and group velocity; skin depth. • Transmission lines: characteristic impedance; impedance transformation; Smith chart; impedance matching; pulse excitation. • Waveguides: modes in rectangular waveguides; boundary conditions; cut-off frequencies; dispersion relations. • Antennas: Dipole antennas; antenna arrays; radiation pattern; reciprocity theorem, antenna gain. |
#3
25th February 2011, 05:18 PM
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Re: Syllabus and exam pattern for ISRO exam (Electronics branch)?
you can get all details here
http://www.isro.org/scripts/job.aspx |
#4
25th February 2011, 09:24 PM
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Re: Syllabus and exam pattern for ISRO exam (Electronics branch)?
ISRO exam pattern--
--there would be a written test,followed by interview for those shortlisted in written test --total questin -->80 --total time--90 minutes --marking= +3 for correct and -1 for wrong answers there is only one section and questions from your specific branch --above data is being collected from various forums --no specific info is no where available in net |
#5
25th February 2011, 10:15 PM
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Re: Syllabus and exam pattern for ISRO exam (Electronics branch)?
Quote:
Total no.of questions : 80 Total time : 90 mins Marking system : 3 for correct answer , -1 for wrong answer. I am attached Electronics syllabus for ISRO. |
#7
14th March 2011, 11:11 PM
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Re: Syllabus and exam pattern for ISRO exam (Electronics branch)?
hii
Syllabus and exam pattern for ISRO exam (Electronics branch) ISRO exam pattern-- there would be a written test,followed by interview for those shortlisted in written test total questin -->80 total time--90 minutes marking= +3 for correct and -1 for wrong answers there is only one section and questions from your specific branch above data is being collected from various forums no specific info is no where available in net Exam pattern for ISRO : Total no.of questions : 80 Total time : 90 mins Marking system : 3 for correct answer , -1 for wrong answer. you can get all details here http://www.isro.org/scripts/job.aspx good luck |
#11
11th January 2014, 08:01 PM
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Re: Syllabus and exam pattern for ISRO exam (Electronics branch)?
sir reference books and sir i am first year student how do study... [email protected] email
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