The Digital Logic Theory and Design Papers is basically included in the third semester of B.E in Electronics and Instrumentation Engineering course and it is totally based on the logics required for designing a combinational or sequential circuits. The paper is coded as 6C0065 which is different for different papers. The main motive of this paper to make aware the candidates about the different theorems and principles for building circuits of various levels.

Importance of this subject:

The most important part of the 3rd Sem Digital Logic Theory and Design Papers are that it gives complete and full details about the different gates, noise margin of a gate and also provides the knowledge of binary conversion. The binary digits of different forms are required to feed in the circuits so that a computer functions according to the user.

Paper Pattern:

The mode of pattern of the Digital Logic Theory and Design Papers includes a total of two groups A and B respectively. In most number of cases the first part consists of small and short answer type questions whereas the 2nd one includes long answer type questions. There are a total of 10 questions in both the parts but the markings of these two parts are different.

Frequently asked questions:

The questions that are frequently asked from the Digital Logic Theory and Design Papers are De morgan’s theorem, wired-logic gates and tri state gates, PAL, PLA, Race around condition, CMOS, NMOS, TTL Logic Gates, BCD, Excess 3 Code, Synchronous Counters, Adder, Subtractor, Encoder and Decoder,  JK Flip flops, Johnson Counters, K Map etc.

Time and marks:

The schedule time and marks allotted to each candidate for the 3rd Sem Digital Logic Theory and Design (6C0065) Papers is three hours and 80 respectively.

Recommended books:

Digital Logic Design, Fourth Edition [Paperback], Brian Holdsworth (Author), Clive Woods (Author)